数字电路综合实验

题目: 实验六——电子沙漏

学院信息与通信工程院

任课教师崔岩松
2018年 12月25日

摘要

沙漏是一种古老的计时工具，也是一种玩具。电子沙漏用发光二极管表示沙粒，模拟沙漏的运动过程。电子沙漏会像真正的沙漏一样，上部的沙粒（点亮的发光二极管）一粒一粒往下掉，下部的沙粒一粒一粒堆起来。
与此同时电子沙漏还可以调节沙粒流动速度，控制计时时间的长短；用开关模拟重力作用，使沙粒朝不同的方向运动；还能设置显示界面，让电子沙漏的形态多样。
在本实验的自拟要求中，我增加了音乐功能，使沙粒能随着音乐声而流动。

关键词：沙漏、电子沙漏、发光二级管。

目录
第一部分概述 1
1.1电子沙漏的相关知识 1
1.2电子沙漏实验基本要求 1
1.3提高要求 3
第二部分综合设计 3
2.1 设计思路 3
2.2总体框图 3
第三部分模块电路分析 4
3.1 分频模块 4
3.2 消抖模块 4
3.3音乐盒模块 4
3.4主程序模块 5
第四部分仿真图像 7
4.1基础要求:沙漏图像的点阵仿真 7
4.2提高要求：每一粒沙的运动路径仿真 7
4.3分频模块的仿真： 8
4.4输入变量rst的仿真： 8
第五部分：功能说明和资源利用情况 9
5.1功能说明： 9
5.2资源利用情况 9
第六部分：故障及问题分析 10
第七部分：总结和结论 11
第八部分：实验代码 11
8.1 顶层模块：uphourglass.v 11
8.2 分频模块 divide.v 80
8.3 消抖模块 debounce.v 83
8.4 音乐模块 music.v 85
第九部分：参考资料 95

第一部分概述

1.1电子沙漏的相关知识

在结构上，两组各 16 个发光二极管分别排列成为两个三角形，如图 1 所示。其中：VD0～ VD15 位于上部，排列成倒三角形；VD0’～VD15’位于下部，排列成正三角形。两个三角形的顶尖相对，组成沙漏形状。当上部有一个发光二极管熄灭时，相应地下部就有一个发光二极管点亮，模拟了沙粒的运动。

1.2电子沙漏实验基本要求

1、采用 8*8 双色点阵显示电子沙漏的开机界面，如图 2 所示。其中红色 LED 代表沙漏的上半部分沙粒 VD0～VD15，绿色 LED 代表沙漏的下半部分 VD0’～VD15’。

2、用拨码开关 SW1 模拟重力感应器。当 SW1 为低电平时，沙粒从 VD0～VD15 向 VD0’～VD15’移动；当 SW1 为高电平时，沙粒从 VD0’～VD15’向 VD0～VD15 移动。
3、按键 BTN0 作为计时启动停止按键；
4、设计实现一个 60 秒计时器，用于在沙粒移动过程中进行计时校准，当按键 BTN0 启动时开始工作，并用数码管 DISP0～DISP1 显示计时结果；
5、 BTN0 启动后沙粒即可按照 SW1 设定的方向移动，当 SW1 为低电平时，点阵显示移动的顺序与对应关系如图 3所示；当 SW1 为高电平，点阵显示移动顺
6、每颗沙粒的移动时间为 1 秒，当移动到图 2 状态且 SW1 位高电平或者移动到图 3的16且 SW1 位低电平时，则保持沙粒不动（点阵状态不变），但 60 秒计时器继续工作，计时至 60 秒停止计时并清零；
7、 60 秒计时过程中如果 SW1 的电平发生变化，则点阵显示从当前状态开始反方向变化；
8、 60 秒计时过程中如果按下 BTN0，则计时暂停，点阵显示停在当时状态，直到再次按下 BTN0，系统继续工作；
9、 BTN5 为系统复位键，按下后计时停止并清零，点阵显示图 2 状态。

1.3提高要求

1、可以调节控制电子沙漏的流动速度。
2、用多种方式呈现电子沙漏界面。
3、自行设定沙粒的移动路径，显示每颗沙粒的移动过程。
4、自拟其它功能。

第二部分综合设计

2.1 设计思路

该实验涉及原理较为复杂，各种功能需要相互配合，故采用了模块化设计，共运用了按键消抖模块、分屏模块、音乐盒模块（自拟功能）、top顶层文件模块。

2.2总体框图

第三部分模块电路分析

3.1 分频模块

1.文件名：divide.v
2.模块声明：
3.输入信号：，其中clk连接到FPGA的晶振输出，频率为50MHz。
4.输出信号：，被风评后的输入信号
5.几分频设置方式：在程序中通过传递参数，修改分频器的计数器位数和分频系数，
，如图传递参数，则可产生一个频率为2Hz的时钟。
Ps.详细代码请参考第八部分。

3.2 消抖模块

1.文件名： debounce.v
2.模块声明：
3.输入信号：

4.输出信号：
Ps.详细代码请参考第八部分。

3.3音乐盒模块

1.文件名：music.v
2.模块声明：
3.输入信号：，例化时，输入时钟采用分频产生的25Mhz的时钟信号。
4.输出信号：驱动蜂鸣器发出音乐。

3.4主程序模块

1．文件名：uphourglass.v
2.模块声明：

3.输入信号：

4.输出信号：

5.变量的声明：

6.点阵和七段数码管的刷新模块，利用人眼的视觉延时，通过高频刷新显示图像。

7．七段数码管的译码模块：

8.调速：

9.重力的模拟（sw_0控制）和多种图像显示的切换（sw_1控制）：

10.暂停和开始模块:

11.点阵刷新模块。

第四部分仿真图像

4.1基础要求:沙漏图像的点阵仿真

在仿真图中可以看到点阵中的row，col_R，col_G，sw_1，clk的电位变化，这些电位对应于实验电路板上点阵的刷新。以下为仿真结果：

以上仿真结果能与提高要求的点阵模块代码一一对应。

4.2提高要求：每一粒沙的运动路径仿真

在仿真图中可以看到点阵中的row，col_R，col_G，sw_1，clk的电位变化，这些电位对应于实验电路板上点阵的刷新。以下为仿真结果：

以上仿真结果能与提高要求的点阵模块代码一一对应。

4.3 分频模块的仿真：

通过参数传递的方式的，分频模块可以实现对输入信号的分频，输出满足需要实验需要的时钟信号。
在仿真测试文件中，通过参数传递的方式，改变分频系数和计数器的位数，可以实现任意整数的分频。

4.4输入变量rst的仿真：

当rst按键按下，给电路提供一个上升沿，之后点阵的图像切换为开机界面的图像，并一直保持下去，以下为仿真图像：
仿真结果，与设计要求一致，当rst按下，点阵图像显示保持不变。只在开机界面图像的八个状态循环。

第五部分：功能说明和资源利用情况

5.1功能说明：

1.完成所有试验要求的基本功能；
2.提高要求中的显示沙粒流动路径；
3.提高要求的调速；
4.自拟要求：用多种颜色显示沙粒路径；
5.自拟要求：可以用蜂鸣器播放音乐。

5.2资源利用情况

资源占用为63%，管脚占用为41%。

第六部分：故障及问题分析

在本次实验中遇到的最大的问题是对程序的仿真。由于在编写程序的过程中并没有编完一个模块就立马对这部分程序进行仿真，导致了在最后进行仿真时，由于程序中间变量的设置过的，彼此的调用过于频繁，仿真程序在完整的程序中跟本无法正常的 运行。在最后对程序进行仿真时只能重新把文件拆分成为给个较小的模块，使我花费在程序仿真上花费了大量时间和精力。

在仿真的调试过程中我还遇上了如下问题：

窗口多开报错：
解决办法：关闭正在运行的 modelsim 软件，再启动仿真
Error loading design：

解决方法：重新检查仿真代码，可能缺少声明，格式错误、没有例化。
3. testbench配置错误：
解决办法：Test bench name、Top level module in test bench、File Name 必须严格对应。

第七部分：总结和结论

在完成了这项为期八周的数电实验后，我有很多收获和感想。在我看来，数字电路的综合实验的总体难度和前半学期的模拟电路实验相比更大，因为实验的总要求更高，需要对面向硬件编程的语言（verilog HDL）有很好的掌握，同时在实验过程中还必须实时的通过ModelSim对程序进行仿真验证，并且由于所要实现的功能较为复杂，程序中需要采用大量的中间变量，和模块化设计电路，对逻辑思维有一点的要求。

在实验的过程中，我也真正的体会到了修改程序和调试程序的艰难，有很多时候程序的主体框架没有问题，仅仅是一个wire或者reg型变量的声明出错，程序就无法运行，还有一些变量值的传递、停止条件的判断都会导致程序的错误。在调试过程中这类问题就更为突出，我记得我只是在测试文件中少输入一个“，”，程序在综合时没有报错，但ModelSim中却因为格式问题，无法生成仿真文件，这一个错误我查了5个小时才发现。
在我看来，数电综合实验是十分繁琐和冗杂的，但同时更是十分重要和有意义的，在这个实验中对我最大的提升就是提高了我的硬件编程能力，而且让我变得更加有耐心，能用一个更好的心态去面对学习上的困难。

第八部分：实验代码

8.1 顶层模块：uphourglass.v

module max2(clk,row,col_R,col_G,sw_0,adjust,rst,set,seg_led,seg_data,speaker,sw_1
);
input clk;//开发板时钟
input set;//启动和停止按键，控制srart(BNT1)
input sw_1;//控制正常计数还是现实沙粒的运动
input sw_0;//开关sw_0，模拟重量传感器
input adjust;//调速开关
input rst;//BNT0
reg[4:0] cnt;//计数
reg[5:0] cnt1;//计数
reg[5:0]min_cnt;//六十秒计数器
reg start;
wire clk1;
wire clk2h;//t=1s
wire clk3h;//t=0.5
wire clk4h;//25MHz
wire set_pulse;//开始暂停判断
wire rst_pulse;//重置判断
reg [3:0]judge = 3’b000;//点阵刷新行刷新的判断
reg [13:0] count; // 计数器分频计数
reg flag=0;//数码管个位和十位切换判断
reg judge1;
reg[7:0] seg [9:0];

output reg [7:0]row; //点阵的行
output reg [7:0]col_R;//点阵的列，显示红色
output reg [7:0]col_G;//点阵的列，显示黄色
output reg [7:0]seg_data;//七段数码管的0~9显示
output reg [7:0]seg_led;
output wire speaker;//蜂鸣器的输出initial

begin
cnt=0;
cnt1=0;
start=0;
judge1=0;
seg[0] = 8’b11111100;
seg[1] = 8’b01100000;
seg[2] = 8’b11011010;
seg[3] = 8’b11110010;
seg[4] = 8’b01100110;
seg[5] = 8’b10110110;
seg[6] = 8’b10111110;
seg[7] = 8’b11100000;
seg[8] = 8’b11111110;
seg[9] = 8’b11110110;
end

always @(posedge clk )//刷新模块
begin
if(count>=14'd16_000)  //if(count>=14'd9_000_000)
begin
count<=14'b0;
flag=flag+1'b1;
judge = judge+3'b001;
end
elsecount<=count+1'b1;
end

divide #(.WIDTH(40),.N(50_000_000)) x1 ( //传递参数
.clk(clk),
.rst_n(!rst), //例化的端口信号都连接到定义好的信号
.clkout(clk2h)
);

divide #(.WIDTH(40),.N(25_000_000)) x4 ( //传递参数
.clk(clk),
.rst_n(!rst), //例化的端口信号都连接到定义好的信号
.clkout(clk3h)
);
divide #(.WIDTH(40),.N(2)) x3 ( //传递参数
.clk(clk),
.rst_n(!rst), //例化的端口信号都连接到定义好的信号
.clkout(clk4h)
);

debounce u1(.clk(clk), //按键消抖
.rst(1’b1),
.key(rst),
.key_pulse(rst_pulse));//

debounce u2(.clk(clk),
.rst(1’b1),
.key(set),
.key_pulse(set_pulse));

music m1(.clk(clk4h),
.speaker(speaker));

always@(posedge clk)//六十秒计数器图像切换模块
begin
if(flag)
begin
seg_led<=8’b11111101;
seg_data<=seg[min_cnt/10];
end
else
begin
seg_led<=8’b11111110;
seg_data<=seg[min_cnt%10];
end
end

assign clk1h=(adjust==1)?clk2h:clk3h;//调速

always @(posedge clk1h or posedge rst)//重力模拟和图像切换beginif(rst)begincnt<=0;cnt1<=0;endelse if(start==1&&sw_1==1)beginif(sw_0==1&&cnt>5'b00000)cnt <= cnt -1;else if(sw_0==1&&cnt==5'b00000);else if(sw_0==0&&cnt<5'b10000)cnt <= cnt +1;else if(sw_0==0&&cnt==5'b10000);endelse if(start==1&&sw_1==0)beginif(sw_0==1&&cnt1>6'b00000)cnt1 <= cnt1 -1;else if(sw_0==1&&cnt1==6'b00000);else if(sw_0==0&&cnt1<6'b011110)cnt1 <= cnt1 +1;else if(sw_0==0&&cnt==6'b011110);endend

always@(posedge clk)
begin
if(rst) start<=0;
else if(set_pulse) start<=~start;
else if(judge1==1) start<=0;
else ;
end

always @(posedge clk2h or posedge rst )
begin
if(rst)min_cnt<=0;
else if(start1)
begin
min_cnt<=1;
if(min_cnt>0&&min_cnt<60) min_cnt<=min_cnt+1;
else if(min_cnt60)
begin
min_cnt<=0;
judge1<=1;
end
end

end

always @(posedge clk)
if(sw_1==1)
begin
if(cnt==5'b00000)case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11111110;col_G = 8'b00000000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00000000;col_G = 8'b11111110;endendcase

else if(cnt==5’b00001)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b11101110;
col_G = 8’b00010000;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b00010000;
col_G = 8’b11101110;
end
endcase

else if(cnt==5’b00010)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b11001110;
col_G = 8’b00110000;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b00110000;
col_G = 8’b11001110;
end

 endcase

else if(cnt==5’b00011)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b11000110;
col_G = 8’b00111000;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b00111000;
col_G = 8’b11000110;
end

 endcase

else if(cnt==5’b00100)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b10000110;
col_G = 8’b01111000;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b01111000;
col_G = 8’b10000110;
end
endcase

else if(cnt==5’b00101)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b10000010;
col_G = 8’b01111100;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b01111100;
col_G = 8’b10000010;
end
endcase

else if(cnt==5’b00110)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000010;
col_G = 8’b11111100;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111100;
col_G = 8’b00000010;
end
endcase

else if(cnt==5’b00111)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase

else if(cnt==5’b01000)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01101100;
col_G = 8’b00010000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00010000;
col_G = 8’b01101100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase

else if(cnt5’b01001)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01001100;
col_G = 8’b00110000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00110000;
col_G = 8’b01001100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase
else if(cnt5’b01010)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00001100;
col_G = 8’b01110000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01110000;
col_G = 8’b00001100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase
else if(cnt5’b01011)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000100;
col_G = 8’b01111000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111000;
col_G = 8’b00000100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase
else if(cnt5’b01100)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase

else if(cnt5’b01101)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00101000;
col_G = 8’b00010000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00010000;
col_G = 8’b00101000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase
else if(cnt5’b01110)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00001000;
col_G = 8’b00110000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00110000;
col_G = 8’b00001000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase

else if(cnt5’b01111)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase
else if(cnt5’b10000)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b00000000;
end
endcase
end
else if(sw_10)
begin
if(cnt16’b000000)
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b11111110;
col_G = 8’b00000000;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01111100;
col_G = 8’b00000000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00010000;//黄灯
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b00000000;
col_G = 8’b11111110;
end
endcase

 else if(cnt1==6'b000001)case(judge%8)3'b000: beginrow = 8'b01111111;      //row为0触发 col为1触发 从右往左读col_R = 8'b11101110;col_G = 8'b00010000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00010000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00000000;col_G = 8'b11111110;endendcaseelse if(cnt1==6'b000010)case(judge%8)3'b000: beginrow = 8'b01111111;        //row为0触发 col为1触发 从右往左读col_R = 8'b11101110;col_G = 8'b00010000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00010000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00000000;col_G = 8'b11111110;endendcaseelse if(cnt1==6'b000011)case(judge%8)3'b000: beginrow = 8'b01111111;        //row为0触发 col为1触发 从右往左读col_R = 8'b11101110;col_G = 8'b00010000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00010000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00000000;col_G = 8'b11111110;endendcaseelse if(cnt1==6'b000100)case(judge%8)3'b000: beginrow = 8'b01111111;        //row为0触发 col为1触发 从右往左读col_R = 8'b11101110;col_G = 8'b00010000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00010000;col_G = 8'b11111110;endendcaseelse if(cnt1==6'b000101)//第二粒沙子case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11001110;col_G = 8'b00110000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00010000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00010000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b000110)//第二粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11001110;col_G = 8'b00110000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00010000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00010000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b000111)//第二粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11001110;col_G = 8'b00110000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00010000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00010000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b000111)//第二粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11001110;col_G = 8'b00110000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00110000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001000)//第二粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11001110;col_G = 8'b00110000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00110000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001001)//第三粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11000110;col_G = 8'b00111000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00010000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00110000;col_G = 8'b11111110;endendcase
else if(cnt1==6'b001010)//第三粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11000110;col_G = 8'b00111000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00010000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00110000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001011)//第三粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11000110;col_G = 8'b00111000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00010000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00110000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001100)//第三粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b11000110;col_G = 8'b00111000;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b00111000;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001101)//第四到第七粒沙子case(judge%8)3'b000: beginrow = 8'b01111111;        //row为0触发 col为1触发 从右往左读col_R = 8'b00000000;col_G = 8'b11111110;end3'b001: beginrow = 8'b10111111;col_R = 8'b01111100;col_G = 8'b00000000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b11111110;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001110)//第八粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b00000000;col_G = 8'b11111110;end3'b001: beginrow = 8'b10111111;col_R = 8'b01101100;col_G = 8'b00010000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00010000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b11111110;col_G = 8'b11111110;endendcase  else if(cnt1==6'b001111)//第八粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b00000000;col_G = 8'b11111110;end3'b001: beginrow = 8'b10111111;col_R = 8'b01101100;col_G = 8'b00010000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00010000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00000000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b11111110;col_G = 8'b11111110;endendcase      else if(cnt1==6'b010000)//第八粒case(judge%8)3'b000: beginrow = 8'b01111111;     //row为0触发 col为1触发 从右往左读col_R = 8'b00000000;col_G = 8'b11111110;end3'b001: beginrow = 8'b10111111;col_R = 8'b01101100;col_G = 8'b00010000;end3'b010: beginrow = 8'b11011111;col_R = 8'b00111000;col_G = 8'b00000000;end3'b011: beginrow =    8'b11101111;col_R = 8'b00010000;col_G = 8'b00000000;end3'b100: beginrow =    8'b11110111;col_R = 8'b00000000;col_G = 8'b00010000;end3'b101: beginrow = 8'b11111011;col_R = 8'b00000000;col_G = 8'b00111000;end3'b110: beginrow = 8'b11111101;col_R = 8'b00010000;col_G = 8'b01111100;end3'b111: beginrow = 8'b11111110;col_R = 8'b11111110;col_G = 8'b11111110;endendcase

else if(cnt16’b010001)//第九粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01001100;
col_G = 8’b00110000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00010000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase
else if(cnt16’b010010)//第九粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01001100;
col_G = 8’b00110000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00010000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00010000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase
else if(cnt1==6’b010011)//第九粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01001100;
col_G = 8’b00110000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00110000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b010100)//第十粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01000100;
col_G = 8’b00111000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00110000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b010101)//第十粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01000100;
col_G = 8’b00111000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00010000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00110000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b010101)//第十粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01000100;
col_G = 8’b00111000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00111000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b010110)//第十粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b01000100;
col_G = 8’b00111000;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b00111000;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b010111)//第十一到十二粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00111000;
col_G = 8’b00000000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b011000)//第十三粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00101000;
col_G = 8’b00010000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt1==6’b011001)//第十三粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00101000;
col_G = 8’b00010000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00010000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt16’b011010)//第十四粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00001000;
col_G = 8’b00110000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00010000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase
else if(cnt16’b011011)//第十四粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00001000;
col_G = 8’b00110000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00110000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase

else if(cnt16’b011100)//第十五粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00110000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase
else if(cnt16’b011101)//第十五粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b00010000;
col_G = 8’b00000000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00000000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00111000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase
else if(cnt1==6’b011110)//第十六粒
case(judge%8)
3’b000: begin
row = 8’b01111111; //row为0触发 col为1触发从右往左读
col_R = 8’b00000000;
col_G = 8’b11111110;
end
3’b001: begin
row = 8’b10111111;
col_R = 8’b00000000;
col_G = 8’b01111100;
end
3’b010: begin
row = 8’b11011111;
col_R = 8’b00000000;
col_G = 8’b00111000;
end
3’b011: begin
row = 8’b11101111;
col_R = 8’b0000000;
col_G = 8’b00010000;
end
3’b100: begin
row = 8’b11110111;
col_R = 8’b00010000;
col_G = 8’b00010000;
end
3’b101: begin
row = 8’b11111011;
col_R = 8’b00111000;
col_G = 8’b00111000;
end
3’b110: begin
row = 8’b11111101;
col_R = 8’b01111100;
col_G = 8’b01111100;
end
3’b111: begin
row = 8’b11111110;
col_R = 8’b11111110;
col_G = 8’b11111110;
end
endcase
end

endmodule

8.2 分频模块 divide.v

module divide ( clk,rst_n,clkout);

    input    clk,rst_n;                       //输入信号，其中clk连接到FPGAc的晶振输出，频率为50MHzoutput clkout;                          //输出信号，可以连接到LED观察分频的时钟//parameter是verilog里常数语句
parameter   WIDTH   = 3;             //计数器的位数，计数的最大值为 2**WIDTH-1
parameter   N   = 5;             //分频系数，请确保 N < 2**WIDTH-1，否则计数会溢出reg     [WIDTH-1:0] cnt_p,cnt_n;     //cnt_p为上升沿触发时的计数器，cnt_n为下降沿触发时的计数器
reg         clk_p,clk_n;     //clk_p为上升沿触发时分频时钟，clk_n为下降沿触发时分频时钟//上升沿触发时计数器的控制
always @ (posedge clk or negedge rst_n )         //posedge和negedge是verilog表示信号上升沿和下降沿//当clk上升沿来临或者rst_n变低的时候执行一次always里的语句beginif(!rst_n)cnt_p<=0;else if (cnt_p==(N-1))cnt_p<=0;else cnt_p<=cnt_p+1;             //计数器一直计数，当计数到N-1的时候清零，这是一个模N的计数器end//上升沿触发的分频时钟输出,如果N为奇数得到的时钟占空比不是50%；如果N为偶数得到的时钟占空比为50%always @ (posedge clk or negedge rst_n)beginif(!rst_n)clk_p<=0;else if (cnt_p<(N>>1))          //N>>1表示右移一位，相当于除以2去掉余数clk_p<=0;else clk_p<=1;               //得到的分频时钟正周期比负周期多一个clk时钟end//下降沿触发时计数器的控制
always @ (negedge clk or negedge rst_n)beginif(!rst_n)cnt_n<=0;else if (cnt_n==(N-1))cnt_n<=0;else cnt_n<=cnt_n+1;end//下降沿触发的分频时钟输出，和clk_p相差半个时钟
always @ (negedge clk)beginif(!rst_n)clk_n<=0;else if (cnt_n<(N>>1))  clk_n<=0;else clk_n<=1;                //得到的分频时钟正周期比负周期多一个clk时钟endassign clkout = (N==1)?clk:(N[0])?(clk_p&clk_n):clk_p;      //条件判断表达式//当N=1时，直接输出clk//当N为偶数也就是N的最低位为0，N（0）=0，输出clk_p//当N为奇数也就是N最低位为1，N（0）=1，输出clk_p&clk_n。正周期多所以是相与

endmodule

8.3 消抖模块 debounce.v

module debounce (clk,rst,key,key_pulse);

    parameter       N  =  1;                      //要消除的按键的数量input             clk;input             rst;            //例化时可以设置为1'b1input   [N-1:0]   key;           //输入的按键    output  [N-1:0]   key_pulse;        //按键动作产生的脉冲 reg     [N-1:0]   key_rst_pre;                //定义一个寄存器型变量存储上一个触发时的按键值reg     [N-1:0]   key_rst;                    //定义一个寄存器变量储存储当前时刻触发的按键值wire    [N-1:0]   key_edge;                   //检测到按键由高到低变化是产生一个高脉冲//利用非阻塞赋值特点，将两个时钟触发时按键状态存储在两个寄存器变量中always @(posedge clk  or  negedge rst)beginif (!rst) beginkey_rst <= {N{1'b1}};                //初始化时给key_rst赋值全为1，{}中表示N个1key_rst_pre <= {N{1'b1}};endelse beginkey_rst <= key;                     //第一个时钟上升沿触发之后key的值赋给key_rst,同时key_rst的值赋给key_rst_prekey_rst_pre <= key_rst;             //非阻塞赋值。相当于经过两个时钟触发，key_rst存储的是当前时刻key的值，key_rst_pre存储的是前一个时钟的key的值end    endassign  key_edge = key_rst_pre & (~key_rst);//脉冲边沿检测。当key检测到下降沿时，key_edge产生一个时钟周期的高电平reg    [17:0]    cnt;                       //产生延时所用的计数器，系统时钟12MHz，要延时20ms左右时间，至少需要18位计数器     //产生20ms延时，当检测到key_edge有效是计数器清零开始计数always @(posedge clk or negedge rst)beginif(!rst)cnt <= 18'h0;else if(key_edge)cnt <= 18'h0;elsecnt <= cnt + 1'h1;end  reg     [N-1:0]   key_sec_pre;                //延时后检测电平寄存器变量reg     [N-1:0]   key_sec;                    //延时后检测key，如果按键状态变低产生一个时钟的高脉冲。如果按键状态是高的话说明按键无效always @(posedge clk  or  negedge rst)beginif (!rst) key_sec <= {N{1'b1}};                else if (cnt==17'h3ffff)//key_sec <= key;  endalways @(posedge clk  or  negedge rst)beginif (!rst)key_sec_pre <= {N{1'b1}};else                   key_sec_pre <= key_sec;             end      assign  key_pulse = key_sec_pre & (~key_sec);

endmodule

8.4 音乐模块 music.v

// Music demo verilog file

// © fpga4fun.com 2003-2015
// Plays a little tune on a speaker
// Use a 25MHz clock if possible (other frequencies will
// change the pitch/speed of the song)

module music(clk, speaker);

input clk;

output reg speaker;

reg [30:0] tone;
always @(posedge clk) tone <= tone+31’d1;

wire [7:0] fullnote;
music_ROM get_fullnote(.clk(clk), .address(tone[29:22]), .note(fullnote));

wire [2:0] octave;
wire [3:0] note;
divide_by12 get_octave_and_note(.numerator(fullnote[5:0]), .quotient(octave), .remainder(note));

reg [8:0] clkdivider;
always @*
case(note)
0: clkdivider = 9’d511;//A
1: clkdivider = 9’d482;// A#/Bb
2: clkdivider = 9’d455;//B
3: clkdivider = 9’d430;//C
4: clkdivider = 9’d405;// C#/Db
5: clkdivider = 9’d383;//D
6: clkdivider = 9’d361;// D#/Eb
7: clkdivider = 9’d341;//E
8: clkdivider = 9’d322;//F
9: clkdivider = 9’d303;// F#/Gb
10: clkdivider = 9’d286;//G
11: clkdivider = 9’d270;// G#/Ab
default: clkdivider = 9’d0;
endcase

reg [8:0] counter_note;
reg [7:0] counter_octave;
always @(posedge clk) counter_note <= counter_note0 ? clkdivider : counter_note-9’d1;
always @(posedge clk) if(counter_note0) counter_octave <= counter_octave0 ? 8’d255 >> octave : counter_octave-8’d1;
always @(posedge clk) if(counter_note0 && counter_octave==0 && fullnote!=0 && tone[21:18]!=0) speaker <= ~speaker;
endmodule

/
module divide_by12(
input [5:0] numerator, // value to be divided by 12
output reg [2:0] quotient,
output [3:0] remainder
);

reg [1:0] remainder3to2;
always @(numerator[5:2])
case(numerator[5:2])
0: begin quotient=0; remainder3to2=0; end
1: begin quotient=0; remainder3to2=1; end
2: begin quotient=0; remainder3to2=2; end
3: begin quotient=1; remainder3to2=0; end
4: begin quotient=1; remainder3to2=1; end
5: begin quotient=1; remainder3to2=2; end
6: begin quotient=2; remainder3to2=0; end
7: begin quotient=2; remainder3to2=1; end
8: begin quotient=2; remainder3to2=2; end
9: begin quotient=3; remainder3to2=0; end
10: begin quotient=3; remainder3to2=1; end
11: begin quotient=3; remainder3to2=2; end
12: begin quotient=4; remainder3to2=0; end
13: begin quotient=4; remainder3to2=1; end
14: begin quotient=4; remainder3to2=2; end
15: begin quotient=5; remainder3to2=0; end
endcase

assign remainder[1:0] = numerator[1:0]; // the first 2 bits are copied through
assign remainder[3:2] = remainder3to2; // and the last 2 bits come from the case statement
endmodule
/

module music_ROM(
input clk,
input [7:0] address,
output reg [7:0] note
);

always @(posedge clk)
case(address)
0: note<= 8’d25;
1: note<= 8’d27;
2: note<= 8’d27;
3: note<= 8’d25;
4: note<= 8’d22;
5: note<= 8’d22;
6: note<= 8’d30;
7: note<= 8’d30;
8: note<= 8’d27;
9: note<= 8’d27;
10: note<= 8’d25;
11: note<= 8’d25;
12: note<= 8’d25;
13: note<= 8’d25;
14: note<= 8’d25;
15: note<= 8’d25;
16: note<= 8’d25;
17: note<= 8’d27;
18: note<= 8’d25;
19: note<= 8’d27;
20: note<= 8’d25;
21: note<= 8’d25;
22: note<= 8’d30;
23: note<= 8’d30;
24: note<= 8’d29;
25: note<= 8’d29;
26: note<= 8’d29;
27: note<= 8’d29;
28: note<= 8’d29;
29: note<= 8’d29;
30: note<= 8’d29;
31: note<= 8’d29;
32: note<= 8’d23;
33: note<= 8’d25;
34: note<= 8’d25;
35: note<= 8’d23;
36: note<= 8’d20;
37: note<= 8’d20;
38: note<= 8’d29;
39: note<= 8’d29;
40: note<= 8’d27;
41: note<= 8’d27;
42: note<= 8’d25;
43: note<= 8’d25;
44: note<= 8’d25;
45: note<= 8’d25;
46: note<= 8’d25;
47: note<= 8’d25;
48: note<= 8’d25;
49: note<= 8’d27;
50: note<= 8’d25;
51: note<= 8’d27;
52: note<= 8’d25;
53: note<= 8’d25;
54: note<= 8’d27;
55: note<= 8’d27;
56: note<= 8’d22;
57: note<= 8’d22;
58: note<= 8’d22;
59: note<= 8’d22;
60: note<= 8’d22;
61: note<= 8’d22;
62: note<= 8’d22;
63: note<= 8’d22;
64: note<= 8’d25;
65: note<= 8’d27;
66: note<= 8’d27;
67: note<= 8’d25;
68: note<= 8’d22;
69: note<= 8’d22;
70: note<= 8’d30;
71: note<= 8’d30;
72: note<= 8’d27;
73: note<= 8’d27;
74: note<= 8’d25;
75: note<= 8’d25;
76: note<= 8’d25;
77: note<= 8’d25;
78: note<= 8’d25;
79: note<= 8’d25;
80: note<= 8’d25;
81: note<= 8’d27;
82: note<= 8’d25;
83: note<= 8’d27;
84: note<= 8’d25;
85: note<= 8’d25;
86: note<= 8’d30;
87: note<= 8’d30;
88: note<= 8’d29;
89: note<= 8’d29;
90: note<= 8’d29;
91: note<= 8’d29;
92: note<= 8’d29;
93: note<= 8’d29;
94: note<= 8’d29;
95: note<= 8’d29;
96: note<= 8’d23;
97: note<= 8’d25;
98: note<= 8’d25;
99: note<= 8’d23;
100: note<= 8’d20;
101: note<= 8’d20;
102: note<= 8’d29;
103: note<= 8’d29;
104: note<= 8’d27;
105: note<= 8’d27;
106: note<= 8’d25;
107: note<= 8’d25;
108: note<= 8’d25;
109: note<= 8’d25;
110: note<= 8’d25;
111: note<= 8’d25;
112: note<= 8’d25;
113: note<= 8’d27;
114: note<= 8’d25;
115: note<= 8’d27;
116: note<= 8’d25;
117: note<= 8’d25;
118: note<= 8’d32;
119: note<= 8’d32;
120: note<= 8’d30;
121: note<= 8’d30;
122: note<= 8’d30;
123: note<= 8’d30;
124: note<= 8’d30;
125: note<= 8’d30;
126: note<= 8’d30;
127: note<= 8’d30;
128: note<= 8’d27;
129: note<= 8’d27;
130: note<= 8’d27;
131: note<= 8’d27;
132: note<= 8’d30;
133: note<= 8’d30;
134: note<= 8’d30;
135: note<= 8’d27;
136: note<= 8’d25;
137: note<= 8’d25;
138: note<= 8’d22;
139: note<= 8’d22;
140: note<= 8’d25;
141: note<= 8’d25;
142: note<= 8’d25;
143: note<= 8’d25;
144: note<= 8’d23;
145: note<= 8’d23;
146: note<= 8’d27;
147: note<= 8’d27;
148: note<= 8’d25;
149: note<= 8’d25;
150: note<= 8’d23;
151: note<= 8’d23;
152: note<= 8’d22;
153: note<= 8’d22;
154: note<= 8’d22;
155: note<= 8’d22;
156: note<= 8’d22;
157: note<= 8’d22;
158: note<= 8’d22;
159: note<= 8’d22;
160: note<= 8’d20;
161: note<= 8’d20;
162: note<= 8’d22;
163: note<= 8’d22;
164: note<= 8’d25;
165: note<= 8’d25;
166: note<= 8’d27;
167: note<= 8’d27;
168: note<= 8’d29;
169: note<= 8’d29;
170: note<= 8’d29;
171: note<= 8’d29;
172: note<= 8’d29;
173: note<= 8’d29;
174: note<= 8’d29;
175: note<= 8’d29;
176: note<= 8’d30;
177: note<= 8’d30;
178: note<= 8’d30;
179: note<= 8’d30;
180: note<= 8’d29;
181: note<= 8’d29;
182: note<= 8’d27;
183: note<= 8’d27;
184: note<= 8’d25;
185: note<= 8’d25;
186: note<= 8’d23;
187: note<= 8’d20;
188: note<= 8’d20;
189: note<= 8’d20;
190: note<= 8’d20;
191: note<= 8’d20;
192: note<= 8’d25;
193: note<= 8’d27;
194: note<= 8’d27;
195: note<= 8’d25;
196: note<= 8’d22;
197: note<= 8’d22;
198: note<= 8’d30;
199: note<= 8’d30;
200: note<= 8’d27;
201: note<= 8’d27;
202: note<= 8’d25;
203: note<= 8’d25;
204: note<= 8’d25;
205: note<= 8’d25;
206: note<= 8’d25;
207: note<= 8’d25;
208: note<= 8’d25;
209: note<= 8’d27;
210: note<= 8’d25;
211: note<= 8’d27;
212: note<= 8’d25;
213: note<= 8’d25;
214: note<= 8’d30;
215: note<= 8’d30;
216: note<= 8’d29;
217: note<= 8’d29;
218: note<= 8’d29;
219: note<= 8’d29;
220: note<= 8’d29;
221: note<= 8’d29;
222: note<= 8’d29;
223: note<= 8’d29;
224: note<= 8’d23;
225: note<= 8’d25;
226: note<= 8’d25;
227: note<= 8’d23;
228: note<= 8’d20;
229: note<= 8’d20;
230: note<= 8’d29;
231: note<= 8’d29;
232: note<= 8’d27;
233: note<= 8’d27;
234: note<= 8’d25;
235: note<= 8’d25;
236: note<= 8’d25;
237: note<= 8’d25;
238: note<= 8’d25;
239: note<= 8’d25;
240: note<= 8’d25;
241: note<= 8’d0;
242: note<= 8’d00;
default: note <= 8’d0;
endcase
endmodule

第九部分：参考资料

《可编程实验板使用说明》；
2019～2020 学年第一学期《数字系统设计实验》课程要求；
数字电路随课实验老师推荐网站：www.fpga4fun.com；
FPGA社区，数字电路随课实验，“小脚丫开发板”学习网站：
https://www.stepfpga.com/doc/%E5%BF%AB%E9%80%9F%E4%B8%8A%E6%89%8Bstep-max10

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bupt数字电路综合实验——电子沙漏 verilogHDL 实现

数字电路综合实验

题目: 实验六——电子沙漏

摘要

第一部分概述

1.1电子沙漏的相关知识

1.2电子沙漏实验基本要求

1.3提高要求

第二部分综合设计

2.1 设计思路

2.2总体框图

第三部分模块电路分析

3.1 分频模块

3.2 消抖模块

3.3音乐盒模块

3.4主程序模块

第四部分仿真图像

4.1基础要求:沙漏图像的点阵仿真

4.2提高要求：每一粒沙的运动路径仿真

4.3 分频模块的仿真：

4.4输入变量rst的仿真：

第五部分：功能说明和资源利用情况

5.1功能说明：

5.2资源利用情况

第六部分：故障及问题分析

第七部分：总结和结论

第八部分：实验代码

8.1 顶层模块：uphourglass.v

8.2 分频模块 divide.v

8.3 消抖模块 debounce.v

8.4 音乐模块 music.v

bupt数字电路综合实验——电子沙漏 verilogHDL 实现相关推荐

最新文章

热门文章

bupt数字电路综合实验——电子沙漏 verilogHDL 实现

数字电路综合实验

题目: 实验六——电子沙漏

摘 要

第一部分 概述

1.1电子沙漏的相关知识

1.2电子沙漏实验基本要求

1.3提高要求

第二部分 综合设计

2.1 设计思路

2.2总体框图

第三部分 模块电路分析

3.1 分频模块

3.2 消抖模块

3.3音乐盒模块

3.4主程序模块

第四部分 仿真图像

4.1基础要求:沙漏图像的点阵仿真

4.2提高要求：每一粒沙的运动路径仿真

4.3 分频模块的仿真：

4.4输入变量rst的仿真：

第五部分：功能说明和资源利用情况

5.1功能说明：

5.2资源利用情况

第六部分：故障及问题分析

第七部分：总结和结论

第八部分：实验代码

8.1 顶层模块：uphourglass.v

8.2 分频模块 divide.v

8.3 消抖模块 debounce.v

8.4 音乐模块 music.v

bupt数字电路综合实验——电子沙漏 verilogHDL 实现相关推荐

最新文章

热门文章

摘要

第一部分概述

第二部分综合设计

第三部分模块电路分析

第四部分仿真图像