基于FPGA的RISC_V五级流水设计---存储设计
2024-06-01 05:20:12
通过上篇文章对cpu的大致认识，就可以开始RTL设计，这次设计不会细致的讲解，希望大家可以自己看书学习，强烈推荐的一本书。通过计组书的学习，不仅你会理解cpu的架构，也会对系统化的设计有更深层次的认识。本次设计为存储器的设计
**
寄存器堆设计
**
端口声明如下
input clk ;input rst_n ;input [4:0] read_reg1 ;input [4:0] read_reg2 ;input [4:0] write_reg ;input [31:0] write_data ;input regwrite ;output reg [31:0] read_data1 ;output reg [31:0] read_data2 ;
时钟采用50Mhz，根据指令将rd1，rd2的数据通过read_data1、read_data2输出，当regwrite为1，表示有数据写入，将数据写入目标寄存器。这里写入数据采用了在时钟下降沿写入，可以有效避免结构冒险刚开始写并没有采用此方法，虽然仿真正确，但在板级验证产生错误。代码如下
always@(negedge clk or negedge rst_n)if(!rst_n)beginx0 <= 32'd0 ;x1 <= 32'd0 ;x2 <= 32'd0 ;x3 <= 32'd0 ;x4 <= 32'd0 ;x5 <= 32'd1 ;x6 <= 32'd2 ;x7 <= 32'd0 ;x8 <= 32'd0 ;x9 <= 32'd0 ;x10 <= 32'd5 ;x11 <= 32'd0 ;x12 <= 32'd0 ;x13 <= 32'd0 ;x14 <= 32'd0 ;x15 <= 32'd0 ;x16 <= 32'd0 ;x17 <= 32'd0 ;x18 <= 32'd0 ;x19 <= 32'd0 ;x20 <= 32'd0 ;x21 <= 32'd0 ;x22 <= 32'd0 ;x23 <= 32'd0 ;x24 <= 32'd0 ;x25 <= 32'd0 ;x26 <= 32'd0 ;x27 <= 32'd0 ;x28 <= 32'd0 ;x29 <= 32'd0 ;x30 <= 32'd0 ;x31 <= 32'd0 ;endelse if(regwrite)begincase(write_reg)5'd0 : x0 <= 'd0 ;5'd1 : x1 <= write_data ;5'd2 : x2 <= write_data ;5'd3 : x3 <= write_data ;5'd4 : x4 <= write_data ;5'd5 : x5 <= write_data ;5'd6 : x6 <= write_data ;5'd7 : x7 <= write_data ;5'd8 : x8 <= write_data ;5'd9 : x9 <= write_data ;5'd10 : x10 <= write_data ;5'd11 : x11 <= write_data ;5'd12 : x12 <= write_data ;5'd13 : x13 <= write_data ;5'd14 : x14 <= write_data ;5'd15 : x15 <= write_data ;5'd16 : x16 <= write_data ;5'd17 : x17 <= write_data ;5'd18 : x18 <= write_data ;5'd19 : x19 <= write_data ;5'd20 : x20 <= write_data ;5'd21 : x21 <= write_data ;5'd22 : x22 <= write_data ;5'd23 : x23 <= write_data ;5'd24 : x24 <= write_data ;5'd25 : x25 <= write_data ;5'd26 : x26 <= write_data ;5'd27 : x27 <= write_data ;5'd28 : x28 <= write_data ;5'd29 : x29 <= write_data ;5'd30 : x30 <= write_data ;5'd31 : x31 <= write_data ;endcase endalways@(*)if(!rst_n)read_data1 = 32'd0;else begincase(read_reg1)5'd0 : read_data1 = x0 ;5'd1 : read_data1 = x1 ;5'd2 : read_data1 = x2 ;5'd3 : read_data1 = x3 ;5'd4 : read_data1 = x4 ;5'd5 : read_data1 = x5 ;5'd6 : read_data1 = x6 ;5'd7 : read_data1 = x7 ;5'd8 : read_data1 = x8 ;5'd9 : read_data1 = x9 ;5'd10 : read_data1 = x10 ;5'd11 : read_data1 = x11 ;5'd12 : read_data1 = x12 ;5'd13 : read_data1 = x13 ;5'd14 : read_data1 = x14 ;5'd15 : read_data1 = x15 ;5'd16 : read_data1 = x16 ;5'd17 : read_data1 = x17 ;5'd18 : read_data1 = x18 ;5'd19 : read_data1 = x19 ;5'd20 : read_data1 = x20 ;5'd21 : read_data1 = x21 ;5'd22 : read_data1 = x22 ;5'd23 : read_data1 = x23 ;5'd24 : read_data1 = x24 ;5'd25 : read_data1 = x25 ;5'd26 : read_data1 = x26 ;5'd27 : read_data1 = x27 ;5'd28 : read_data1 = x28 ;5'd29 : read_data1 = x29 ;5'd30 : read_data1 = x30 ;5'd31 : read_data1 = x31 ;default : read_data1 = x0 ;endcaseendalways@(*)if(!rst_n)read_data2 = 32'd0;else begincase(read_reg2)5'd0 : read_data2 = x0 ;5'd1 : read_data2 = x1 ;5'd2 : read_data2 = x2 ;5'd3 : read_data2 = x3 ;5'd4 : read_data2 = x4 ;5'd5 : read_data2 = x5 ;5'd6 : read_data2 = x6 ;5'd7 : read_data2 = x7 ;5'd8 : read_data2 = x8 ;5'd9 : read_data2 = x9 ;5'd10 : read_data2 = x10 ;5'd11 : read_data2 = x11 ;5'd12 : read_data2 = x12 ;5'd13 : read_data2 = x13 ;5'd14 : read_data2 = x14 ;5'd15 : read_data2 = x15 ;5'd16 : read_data2 = x16 ;5'd17 : read_data2 = x17 ;5'd18 : read_data2 = x18 ;5'd19 : read_data2 = x19 ;5'd20 : read_data2 = x20 ;5'd21 : read_data2 = x21 ;5'd22 : read_data2 = x22 ;5'd23 : read_data2 = x23 ;5'd24 : read_data2 = x24 ;5'd25 : read_data2 = x25 ;5'd26 : read_data2 = x26 ;5'd27 : read_data2 = x27 ;5'd28 : read_data2 = x28 ;5'd29 : read_data2 = x29 ;5'd30 : read_data2 = x30 ;5'd31 : read_data2 = x31 ;default : read_data2 = x0 ;endcaseend
这里仅供参考，可以采用二维数组的方法，更加简便。
指令存储器设计
指令存储器用于存储运行的指令，可以使用rom来设计。端口声明如下
module instruction(address ,rst_n ,a1 ,a2 ,a3 ,a4 ,b1 ,b2 ,b3 ,b4 ,end_flag ,ins );input [31:0] address;input rst_n;output reg [31:0] ins;
//====================array===================
input [11:0] a1 ;
input [11:0] a2 ;
input [11:0] a3 ;
input [11:0] a4 ;
input [11:0] b1 ;
input [11:0] b2 ;
input [11:0] b3 ;
input [11:0] b4 ;
output reg end_flag;always@(*)if(!rst_n)beginins ='d0;end_flag = 'd0;endelse begin //mul funct3 000改为001case(address)'d0 : ins = 32'b000000000000_00000_110_01010_0010011; //ori x10,x0,0 #array c'd4 : ins = 32'b000000010000_00000_110_01011_0010011; //ori x11,x0,16 #a'd8 : ins = 32'b000000100000_00000_110_01100_0010011; //ori x12,x0,32 #b//#c'd12 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd16 : ins = 32'b0000000_11111_00000_010_00000_0100011; //sw x31,0(x0)'d20 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd24 : ins = 32'b0000000_11111_00000_010_00100_0100011; //sw x31,4(x0)'d28 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd32 : ins = 32'b0000000_11111_00000_010_01000_0100011; //sw x31,8(x0)'d36 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd40 : ins = 32'b0000000_11111_00000_010_01100_0100011; //sw x31,12(x0)//#a'd44 : ins = {a4,20'b00000_110_11111_0010011}; //ori x31,x0,106'd48 : ins = 32'b0000000_11111_00000_010_10000_0100011; //sw x31,16(x0)'d52 : ins = {a3,20'b00000_110_11111_0010011}; //ori x31,x0,1'd56 : ins = 32'b0000000_11111_00000_010_10100_0100011; //sw x31,20(x0)'d60 : ins = {a2,20'b00000_110_11111_0010011}; //ori x31,x0,2'd64 : ins = 32'b0000000_11111_00000_010_11000_0100011; //sw x31,24(x0)'d68 : ins = {a1,20'b00000_110_11111_0010011}; //ori x31,x0,3'd72 : ins = 32'b0000000_11111_00000_010_11100_0100011; //sw x31,28(x0)////#b'd76 : ins = {b4,20'b00000_110_11111_0010011}; //ori x31,x0,4'd80 : ins = 32'b0000001_11111_00000_010_00000_0100011; //sw x31,32(x0)'d84 : ins = {b3,20'b00000_110_11111_0010011}; //ori x31,x0,5'd88 : ins = 32'b0000001_11111_00000_010_00100_0100011; //sw x31,36(x0)'d92 : ins = {b2,20'b00000_110_11111_0010011}; //ori x31,x0,6'd96 : ins = 32'b0000001_11111_00000_010_01000_0100011; //sw x31,40(x0)'d100 : ins = {b1,20'b00000_110_11111_0010011}; //ori x31,x0,7'd104 : ins = 32'b0000001_11111_00000_010_01100_0100011; //sw x31,44(x0)//mm: 'd108 : ins = 32'b000000000010_00000_110_11100_0010011; // li x28,2 ori x28,x0,2'd112 : ins = 32'b000000000000_00000_110_00101_0010011; // li x5,0 ori x5,x0,0//L1:'d116 : ins = 32'b000000000000_00000_110_00110_0010011; // li x6,0 ori x6,x0,0//L2:'d120 : ins = 32'b000000000000_00000_110_00111_0010011; // li x7,0 ori x7,x0,0'd124 : ins = 32'b000000000001_00101_001_11110_0010011; // slli x30,x5,1'd128 : ins = 32'b0000000_00110_11110_000_11110_0110011; // add x30,x30,x6'd132 : ins = 32'b000000000010_11110_001_11110_0010011; // slli x30,x30,2'd136 : ins = 32'b0000000_11110_01010_000_11110_0110011; // add x30,x10,x30'd140 : ins = 32'b000000000000_11110_010_01111_0000011; // lw x15,0(x30)//L3:'d144 : ins = 32'b000000000001_00111_001_11101_0010011; // slli x29,x7,1 'd148 : ins = 32'b0000000_00110_11101_000_11101_0110011; // add x29,x29,x6 'd152 : ins = 32'b000000000010_11101_001_11101_0010011; // slli x29,x29,2 'd156 : ins = 32'b0000000_01100_11101_000_11101_0110011; // add x29,x12,x29 'd160 : ins = 32'b000000000000_11101_010_10000_0000011; // lw x16,0(x29) 'd164 : ins = 32'b000000000001_00101_001_11101_0010011; // slli x29,x5,1 'd168 : ins = 32'b0000000_11101_00111_000_11101_0110011; // add x29,x29,x7 'd172 : ins = 32'b000000000010_11101_001_11101_0010011; // slli x29,x29,2 'd176 : ins = 32'b0000000_01011_11101_000_11101_0110011; // add x29,x11,x29 'd180 : ins = 32'b000000000000_11101_010_10001_0000011; // lw x17,0(x29) 'd184 : ins = 32'b0000001_10000_10001_001_10000_0110011; // mul x16, x16, x17 'd188 : ins = 32'b0000000_01111_10000_000_01111_0110011; // add x15, x15, x16 'd192 : ins = 32'b000000000001_00111_000_00111_0010011; // addi x7,x7,1 'd196 : ins = 32'b1111111_11100_00111_110_00111_1100111; // bltu x7,x28,L3-26 pc = pc-52 = 144 'd200 : ins = 32'b0000000_01111_11110_010_00000_0100011; // sw x15,0(x30) 'd204 : ins = 32'b000000000001_00110_000_00110_0010011; // addi x6,x6,1 'd208 : ins = 32'b1111110_11100_00110_110_10101_1100111; // bltu x6,x28,L2 -44 ,pc = pc-88 =120 'd212 : ins = 32'b000000000001_00101_000_00101_0010011; // addi x5,x5,1 'd216 : ins = 32'b1111110_11100_00101_110_01111_1100111; // bltu x5,x28,L1 -50 pc= pc-100 = 116 'd220 :end_flag = 1'b1;default : ins = 32'd0;endcaseendendmodule
/* //#a'd44 : ins = 32'b000001101010_00000_110_11111_0010011; //ori x31,x0,106'd48 : ins = 32'b0000000_11111_00000_010_10000_0100011; //sw x31,16(x0)'d52 : ins = 32'b000000000001_00000_110_11111_0010011; //ori x31,x0,1'd56 : ins = 32'b0000000_11111_00000_010_10100_0100011; //sw x31,20(x0)'d60 : ins = 32'b000000000010_00000_110_11111_0010011; //ori x31,x0,2'd64 : ins = 32'b0000000_11111_00000_010_11000_0100011; //sw x31,24(x0)'d68 : ins = 32'b000000000011_00000_110_11111_0010011; //ori x31,x0,3'd72 : ins = 32'b0000000_11111_00000_010_11100_0100011; //sw x31,28(x0)////#b'd76 : ins = 32'b000000000100_00000_110_11111_0010011; //ori x31,x0,4'd80 : ins = 32'b0000001_11111_00000_010_00000_0100011; //sw x31,32(x0)'d84 : ins = 32'b000000000101_00000_110_11111_0010011; //ori x31,x0,5'd88 : ins = 32'b0000001_11111_00000_010_00100_0100011; //sw x31,36(x0)'d92 : ins = 32'b0000000000110_00000_110_11111_0010011; //ori x31,x0,6'd96 : ins = 32'b0000001_11111_00000_010_01000_0100011; //sw x31,40(x0)'d100 : ins = 32'b0000000000111_00000_110_11111_0010011; //ori x31,x0,7'd104 : ins = 32'b0000001_11111_00000_010_01100_0100011; //sw x31,44(x0)
*/
/*
//===========================a b ============================//#a'd44 : ins = {a4,20'b00000_110_11111_0010011}; //ori x31,x0,106'd48 : ins = 32'b0000000_11111_00000_010_10000_0100011; //sw x31,16(x0)'d52 : ins = {a3,20'b00000_110_11111_0010011}; //ori x31,x0,1'd56 : ins = 32'b0000000_11111_00000_010_10100_0100011; //sw x31,20(x0)'d60 : ins = {a2,20'b00000_110_11111_0010011}; //ori x31,x0,2'd64 : ins = 32'b0000000_11111_00000_010_11000_0100011; //sw x31,24(x0)'d68 : ins = {a1,20'b00000_110_11111_0010011}; //ori x31,x0,3'd72 : ins = 32'b0000000_11111_00000_010_11100_0100011; //sw x31,28(x0)////#b'd76 : ins = {b4,20'b00000_110_11111_0010011}; //ori x31,x0,4'd80 : ins = 32'b0000001_11111_00000_010_00000_0100011; //sw x31,32(x0)'d84 : ins = {b3,20'b00000_110_11111_0010011}; //ori x31,x0,5'd88 : ins = 32'b0000001_11111_00000_010_00100_0100011; //sw x31,36(x0)'d92 : ins = {b2,20'b00000_110_11111_0010011}; //ori x31,x0,6'd96 : ins = 32'b0000001_11111_00000_010_01000_0100011; //sw x31,40(x0)'d100 : ins = {b1,20'b00000_110_11111_0010011}; //ori x31,x0,7'd104 : ins = 32'b0000001_11111_00000_010_01100_0100011; //sw x31,44(x0)*//*'d0 : ins = 32'b000000000000_00000_110_01010_0010011; //ori x10,x0,0 #array c'd4 : ins = 32'b000000010000_00000_110_01011_0010011; //ori x11,x0,16 #a'd8 : ins = 32'b000000100000_00000_110_01100_0010011; //ori x12,x0,32 #b//#c'd12 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd16 : ins = 32'b0000000_11111_00000_010_00000_0100011; //sw x31,0(x0)'d20 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd24 : ins = 32'b0000000_11111_00000_010_00100_0100011; //sw x31,4(x0)'d28 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd32 : ins = 32'b0000000_11111_00000_010_01000_0100011; //sw x31,8(x0)'d36 : ins = 32'b000000000000_00000_110_11111_0010011; //ori x31,x0,0'd40 : ins = 32'b0000000_11111_00000_010_01100_0100011; //sw x31,12(x0)'d44 : ins = 32'b000001101010_00000_110_11111_0010011; //ori x31,x0,106'd48 : ins = 32'b0000000_11111_00000_010_10000_0100011; //sw x31,16(x0)'d52 : ins = 32'b000000000001_00000_110_11111_0010011; //ori x31,x0,1'd56 : ins = 32'b0000000_11111_00000_010_10100_0100011; //sw x31,20(x0)'d60 : ins = 32'b000000000010_00000_110_11111_0010011; //ori x31,x0,2'd64 : ins = 32'b0000000_11111_00000_010_11000_0100011; //sw x31,24(x0)'d68 : ins = 32'b000000000011_00000_110_11111_0010011; //ori x31,x0,3'd72 : ins = 32'b0000000_11111_00000_010_11100_0100011; //sw x31,28(x0)////#b'd76 : ins = 32'b000000000100_00000_110_11111_0010011; //ori x31,x0,4'd80 : ins = 32'b0000001_11111_00000_010_00000_0100011; //sw x31,32(x0)'d84 : ins = 32'b000000000101_00000_110_11111_0010011; //ori x31,x0,5'd88 : ins = 32'b0000001_11111_00000_010_00100_0100011; //sw x31,36(x0)'d92 : ins = 32'b0000000000110_00000_110_11111_0010011; //ori x31,x0,6'd96 : ins = 32'b0000001_11111_00000_010_01000_0100011; //sw x31,40(x0)'d100 : ins = 32'b0000000000111_00000_110_11111_0010011; //ori x31,x0,7'd104 : ins = 32'b0000001_11111_00000_010_01100_0100011; //sw x31,44(x0)//mm: 'd108 : ins = 32'b000000000010_00000_110_11100_0010011; // li x28,2 ori x28,x0,2'd112 : ins = 32'b000000000000_00000_110_00101_0010011; // li x5,0 ori x5,x0,0//L1:'d116 : ins = 32'b000000000000_00000_110_00110_0010011; // li x6,0 ori x6,x0,0//L2:'d120 : ins = 32'b000000000000_00000_110_00111_0010011; // li x7,0 ori x7,x0,0'd124 : ins = 32'b000000000001_00101_001_11110_0010011; // slli x30,x5,1'd128 : ins = 32'b0000000_00110_11110_000_11110_0110011; // add x30,x30,x6'd132 : ins = 32'b000000000010_11110_001_11110_0010011; // slli x30,x30,2'd136 : ins = 32'b0000000_11110_01010_000_11110_0110011; // add x30,x10,x30'd140 : ins = 32'b000000000000_11110_010_01111_0000011; // lw x15,0(x30)//L3:'d144 : ins = 32'b000000000001_00111_001_11101_0010011; // slli x29,x7,1 'd148 : ins = 32'b0000000_00110_11101_000_11101_0110011; // add x29,x29,x6 'd152 : ins = 32'b000000000010_11101_001_11101_0010011; // slli x29,x29,2 'd156 : ins = 32'b0000000_01100_11101_000_11101_0110011; // add x29,x12,x29 'd160 : ins = 32'b000000000000_11101_010_10000_0000011; // lw x16,0(x29) 'd164 : ins = 32'b000000000001_00101_001_11101_0010011; // slli x29,x5,1 'd168 : ins = 32'b0000000_11101_00111_000_11101_0110011; // add x29,x29,x7 'd172 : ins = 32'b000000000010_11101_001_11101_0010011; // slli x29,x29,2 'd176 : ins = 32'b0000000_01011_11101_000_11101_0110011; // add x29,x11,x29 'd180 : ins = 32'b000000000000_11101_010_10001_0000011; // lw x17,0(x29) 'd184 : ins = 32'b0000001_10000_10001_001_10000_0110011; // mul x16, x16, x17 'd188 : ins = 32'b0000000_01111_10000_000_01111_0110011; // add x15, x15, x16 'd192 : ins = 32'b000000000001_00111_000_00111_0010011; // addi x7,x7,1 'd196 : ins = 32'b1111111_11100_00111_110_00111_1100111; // bltu x7,x28,L3-26 pc = pc-52 = 144 'd200 : ins = 32'b0000000_01111_11110_010_00000_0100011; // sw x15,0(x30) 'd204 : ins = 32'b000000000001_00110_000_00110_0010011; // addi x6,x6,1 'd208 : ins = 32'b1111110_11100_00110_110_10101_1100111; // bltu x6,x28,L2 -44 ,pc = pc-88 =120 'd212 : ins = 32'b000000000001_00101_000_00101_0010011; // addi x5,x5,1 'd216 : ins = 32'b1111110_11100_00101_110_01111_1100111; // bltu x5,x28,L1 -50 pc= pc-100 = 116 'd220 :end_flag = 1'b1;*/
这里运行的是一个根据串口接受到两个矩阵的数据，然后进行运算，在模块外我放置了最初的指令，大家可以进行更改。
数据存储器设计
input clk ;input rst_n ;input [31:0] address ;input [31:0] write_data ;input memwrite ;input memread ;output reg [31:0] read_data ;
数据存储器的设计与寄存器堆设计类似，当memread信号为高，根据地址读取数据，当memwrite为高时根据地址写入数据，在这里存储数据也采用了下降沿存储，和寄存器设计当时遇到了同样的问题这里不再解释。代码如下
data_mem(clk ,rst_n ,address ,write_data ,memwrite ,memread ,read_data //con ,//uart_data , //con_in);input clk;input rst_n ;input [31:0] address ;input [31:0] write_data ;input memwrite ;input memread ;output reg [31:0] read_data ;// input con_in;//input [3:0] con;// output reg [31:0] uart_data;reg [31:0] m1 ;reg [31:0] m2 ;reg [31:0] m3 ;reg [31:0] m4 ;reg [31:0] m5 ;reg [31:0] m6 ;reg [31:0] m7 ;reg [31:0] m8 ;reg [31:0] m9 ;reg [31:0] m10 ;reg [31:0] m11 ;reg [31:0] m12 ;reg [31:0] m13 ;reg [31:0] m14 ;reg [31:0] m15 ;always@(negedge clk or negedge rst_n) if(!rst_n)beginm1 <= 'd0;m2 <= 'd0;m3 <= 'd0;m4 <= 'd0;m5 <= 'd0;m6 <= 'd0;m7 <= 'd0;m8 <= 'd0;m9 <= 'd0;m10 <= 'd0;m11 <= 'd0;m12 <= 'd0;m13 <= 'd0;m14 <= 'd0;m15 <= 'd0;endelse beginif(memwrite == 1)case(address)'d0 : m1 <= write_data ;'d4 : m2 <= write_data ;'d8 : m3 <= write_data ;'d12 : m4 <= write_data ;'d16 : m5 <= write_data ;'d20 : m6 <= write_data ;'d24 : m7 <= write_data ;'d28 : m8 <= write_data ;'d32 : m9 <= write_data ;'d36 : m10 <= write_data ;'d40 : m11 <= write_data ;'d44 : m12 <= write_data ;'d48 : m13 <= write_data ;'d52 : m14 <= write_data ;'d56 : m15 <= write_data ;default: beginm1 <= m1 ;m2 <= m2 ;m3 <= m3 ;m4 <= m4 ;m5 <= m5 ;m6 <= m6 ;m7 <= m7 ;m8 <= m8 ;m9 <= m9 ;m10 <= m10;m11 <= m11;m12 <= m12;m13 <= m13;m14 <= m14;m15 <= m15;endendcaseendalways@(*)if(!rst_n)read_data = 'd0;else begin if(memread == 1)case(address)'d0 : read_data = m1 ;'d4 : read_data = m2 ;'d8 : read_data = m3 ;'d12 : read_data = m4 ;'d16 : read_data = m5 ;'d20 : read_data = m6 ;'d24 : read_data = m7 ;'d28 : read_data = m8 ;'d32 : read_data = m9 ;'d36 : read_data = m10 ;'d40 : read_data = m11 ;'d44 : read_data = m12 ;'d48 : read_data = m13 ;'d52 : read_data = m14 ;'d56 : read_data = m15 ;default : read_data = 'd0 ;endcaseendendmodule cpu中相关存储的设计就到此结束了。
基于FPGA的RISC_V五级流水设计---存储设计相关推荐
- m基于FPGA的积分梳状CIC滤波器verilog设计
目录 1.算法描述 2.仿真效果预览 3.verilog核心程序 4.完整FPGA 1.算法描述 积分梳状滤波器,是指该滤波器的冲激响应具有如下形式: 其物理框图如图所示: 可见,CIC滤波器是由两部 ...
- 基于FPGA的以太网控制器（MAC）设计（下）
今天给大侠带来基于FPGA的以太网控制器(MAC)设计,由于篇幅较长,分三篇.今天带来第三篇,下篇,程序的仿真与测试和总结.话不多说,上货. 导读 当前,互联网已经极大地改变了我们的生产和生活.与之相 ...
- 电子技术课程设计基于FPGA的音乐硬件演奏电路的设计与实现
wx供重浩:创享日记 对话框发送:乐曲电路 免费获取完整无水印论文报告(包含电路图) 文章目录 一.设计任务要求 二.总体框图 三.选择器件 四.功能模块 五.总体设计电路图 六.结束语 一.设计任务 ...
- 电机控制器，FPGA 硬件电流环 基于FPGA的永磁同步伺服控制系统的设计
电机控制器,FPGA 硬件电流环 基于FPGA的永磁同步伺服控制系统的设计,在FPGA实现了伺服电机的矢量控制. 有坐标变换,电流环,速度环,位置环,电机反馈接口,SVPWM. Verilog ID: ...
- 基于FPGA的以太网控制器（MAC）设计（中）
今天给大侠带来基于FPGA的以太网控制器(MAC)设计,由于篇幅较长,分三篇.今天带来第二篇,中篇,以太网控制器(MAC)程序的实现.话不多说,上货. 导读 当前,互联网已经极大地改变了我们的生产和生 ...
- 基于FPGA的永磁同步伺服控制系统的设计，在FPGA实现了伺服电机的矢量控制
基于FPGA的永磁同步伺服控制系统的设计,在FPGA实现了伺服电机的矢量控制, 坐标变换,电流环,速度环,位置环,电机反馈接口,SVPWM. . . 都是通过Verilog 语言来实现的,具有很高的研 ...
- 基于FPGA的永磁同步伺服控制系统的设计，在FPGA实现了伺服电机的矢量控制， 坐标变换，电流环，速度环，位置环，电机反馈接口，SVPWM 都是通过Verilog 语言来实现的
基于FPGA的永磁同步伺服控制系统的设计,在FPGA实现了伺服电机的矢量控制, 坐标变换,电流环,速度环,位置环,电机反馈接口,SVPWM. . . 都是通过Verilog 语言来实现的,具有很高的研 ...
- 基于FPGA的永磁同步伺服控制系统的设计，在FPGA实现了伺服电机的矢量控制， 坐标变换，电流环，速度环
基于FPGA的永磁同步伺服控制系统的设计,在FPGA实现了伺服电机的矢量控制, 坐标变换,电流环,速度环,位置环,电机反馈接口,SVPWM 都是通过Verilog 语言来实现的 FPGA 硬件电流环 ...
- FPGA 硬件电流环 基于FPGA的永磁同步伺服控制系统的设计
FPGA 硬件电流环 基于FPGA的永磁同步伺服控制系统的设计,在FPGA实现了伺服电机的矢量控制. 有坐标变换,电流环,速度环,位置环,电机反馈接口,SVPWM. Verilog 编号:841000 ...
最新文章
- [BZOJ 2002][Hnoi2010]Bounce 弹飞绵羊（分块）
- cocos2d-js 3.0 RC0 监听返回键、菜单键、进入后台（home键）、恢复显示等事件
- java集合转字符串拼接_关于集合和字符串的互转实现方法
- Android中selector的使用
- Windows 2003 主域控和DNS迁移到Windows 2008 R2（2）
- 如何使用计算机中的导出,如何将iPhone手机中的音乐导出至电脑
- linux 快捷matlab_ubuntu下Matlab_Linux添加工具包操作步骤
- python比较两个列表不同部分_Python实现比较两个列表(list)范围
- 国庆假期程序员是这样给自己粉饰无限的逼格！
- 简单的java程序设计原则和模式
- OpenCV学习笔记05--ROI和WidthStep的运用
- Pico Neo3 4VR游戏下载地址及十大好玩游戏推荐
- 电子发票撤销 java_已确认的发票如何撤销
- gatk过滤_VCF文件中的原始突变过滤–filter raw variants in vcf
- 输入中文转换成拼音首字母
- uboot启动流程详解
- 2022-2028年全球与中国SCADA石油和天然气行业发展趋势及投资战略分析
- 餐饮连锁店远程视频监控系统设计需求分析
- NLP常见语言模型及数据增强方法总结
- 麒麟信安操作系统推动智慧电力高质发展
热门文章
- 病毒不可怕，就怕流氓有文化
- 21. 理解CNI和CNI插件
- 那些年啊 那些事 一个程序员的奋斗史 121
- 【PV操作】买面包的叫号算法（存疑）
- Android发送消息的核心代码,Android 抖音 发消息Call 调用 实现群发消息 代码hook源码...
- 2022-10-11(一、远程命令执行和系统命令执行)
- listen1在火狐浏览器安装的步骤和细节处理
- Android相机资源占用,为保护用户隐私Android 11调整相机选项 APP调用相机时只可使用默认相机...
- 如何使用python-docx第三方库，操作读写doc Word文档，快速制作数据报表
- 微信 服务器 多开 不需要手机,实用：手把手教你不用手机号就可以完美注册微信!...