DA14580蓝牙硬件系统总览（一）

DA14580蓝牙硬件系统总览

The DA14580 contains the following internal blocks:
DA14580包含以下内部模块：

3.1 ARM CORTEXM0 CPU

（不做介绍了）

3.2 BLUETOOTH SMART 蓝牙智能

3.2.1 BLE Core

The BLE (Bluetooth Low Energy) core is a qualified Bluetooth baseband controller compatible with the Bluetooth Smart specification and it is in charge of packet encoding/decoding and frame scheduling.
BLE（蓝牙低功耗）内核是与Bluetooth Smart规范兼容的合格蓝牙基带控制器，它负责数据包的编码/解码和帧调度。
Features****特色
All device classes support (Broadcaster, Central, Observer, Peripheral)
所有设备类支持（广播，中央，观察者，外围设备）
All packet types (Advertising / Data / Control)
所有数据包类型（广告/数据/控制）
Encryption (AES / CCM)
加密（AES / CCM）
Bit stream processing (CRC, Whitening)
比特流处理（CRC，增白）
FDMA/TDMA/events formatting and synchronization
FDMA / TDMA /事件格式化和同步
Frequency hopping calculation
跳频计算
Operating clock 16 MHz or 8 MHz
工作时钟16 MHz或8 MHz
Low power modes supporting 32.0 kHz or 32.768 kHz
支持32.0 kHz或32.768 kHz的低功耗模式
Supports power down of the baseband during the protocol’s idle periods
支持在协议空闲期间关闭基带电源
AHB Slave interface for register file access
AHB从接口用于寄存器文件访问
AHB Slave interface for Exchange Memory access of CPU via BLE core
AHB从接口，用于通过BLE内核访问CPU的交换内存
AHB Master interface for direct access of BLE core to Exchange Memory space
AHB主接口，用于直接访问BLE内核到交换内存空间

3.2.2 Radio Transceiver 无线电收发器

The Radio Transceiver implements the RF part of the Bluetooth Smart protocol. Together with the Bluetooth 4.0 PHY layer, this provides a 93 dB RF link budget for reliable wireless communication.
无线电收发器实现了Bluetooth Smart协议的RF部分。与蓝牙4.0 PHY层一起，可提供93 dB的RF链路预算，以实现可靠的无线通信。
All RF blocks are supplied by on-chip low-drop out-regulators (LDOs). The bias scheme is programmable perblock and optimized for minimum power consumption.
所有RF模块均由片上低压降输出稳压器（LDO）提供。偏置方案是每个块可编程的，并针对最小功耗进行了优化。
The Bluetooth LE radio comprises the Receiver, Transmitter, Synthesizer, Rx/Tx combiner block, and Biasing LDOs.
蓝牙LE无线电包括接收器，发送器，合成器，Rx / Tx组合器模块和偏置LDO。
Features 特色
• Single ended RFIO interface, 50Ω matched
•单端RFIO接口，匹配50Ω
• Alignment free operation
•免对准操作
• -93 dBm receiver sensitivity
•-93 dBm接收灵敏度
• 0 dBm transmit output power
•0 dBm发射输出功率
• Ultra low power consumption
•超低功耗
• Fast frequency tuning minimises overhead
•快速的频率调整使开销最小化

3.2.3 SmartSnippets 软件平台

The DA14580 comes complete with Dialog’s SmartSnippets Bluetooth Software platform which includes a qualified Bluetooth Smart single-mode stack on chip.
DA14580配备了Dialog的Smart Snippets蓝牙软件平台，该平台包括合格的Bluetooth Smart单模协议栈在芯片内。

Numerous Bluetooth Smart profiles for consumer wellness, sport, fitness, security and proximity applications are supplied as standard, while additional customer profiles can be developed and added as needed.
标配了许多用于消费者健康，运动，健身，安全和邻近应用的Bluetooth Smart配置文件，同时可以根据需要开发和添加其他客户配置文件。

The SmartSnippets software development environment is based on Keil’s uVision mature tools and contains example application code for both embedded and hosted modes.
SmartSnippets软件开发环境基于Keil的uVision成熟工具，并包含嵌入式和托管模式的示例应用程序代码。

Apart from the protocol stack, the Software platform supports a Hardware Abstraction Layer (HAL) which enables easy access to peripheral’s features from a programmer’s point of view, as presented in the following figure.
除了协议栈，软件平台还支持硬件抽象层（HAL），从程序员的角度来看，它可以轻松访问外围设备的功能，如下图所示。

Core drivers are provided for each interface of the DA14580 enabling optimized usage of the hardware’s capabilities. These drivers provide an easy-to-use interface towards the hardware engines without having to interfere with the register programming directly.
DA14580的每个接口都提供了核心驱动程序，可优化硬件功能的使用。这些驱动程序为硬件引擎提供了易于使用的界面，而不必直接进行寄存器编程。

On top of the core drivers, a number of sample drivers is also provided enabling communication with basic Bluetooth Smart application components: accelerometers, FLASH/EEPROM non-volatile memories, etc.
除了核心驱动程序之外，还提供了许多示例驱动程序，使它们能够与基本的Bluetooth Smart应用程序组件进行通信：加速度计，FLASH / EEPROM非易失性存储器等。

3.3 MEMORIES 内存

The following memories are part of the DA14580’s internal blocks:
以下内存是DA14580内部模块的一部分：
ROM. This is a 84 kB ROM containing the Bluetooth Smart protocol stack as well as the boot code sequence.
**只读存储器。**这是一个84 kB ROM，包含Bluetooth Smart协议栈以及启动代码序列。
OTP. This is a 32 kB One-Time Programmable memory array, used to store the application code as well as Bluetooth Smart profiles. It also contains the system configuration and calibration data.
**OTP。**这是一个32 kB一次性可编程存储器阵列，用于存储应用程序代码以及Bluetooth Smart配置文件。它还包含系统配置和校准数据。
System SRAM. This is a 42 kB system SRAM (SysRAM) which is primarily used for mirroring the program code from the OTP when the system wakes/powers up. It also serves as Data RAM for intermediate variables and various data that the protocol requires.Optionally, it can be used as extra memory space for the BLE TX and RX data structures.
**系统SRAM。**这是一个42 kB的系统SRAM（系统RAM），主要用于在系统唤醒/上电时从OTP镜像程序代码。它还用作协议变量所需的中间变量和各种数据的数据RAM。可选地，它可用作BLE TX和RX数据结构的额外存储空间。
Retention RAMs. These are 4 special low leakage SRAM cells (2 kB + 2 kB + 3 kB + 1 kB) used to store various data of the Bluetooth Smart protocol as well as the system’s global variables and processor stack when the system goes into Deep Sleep mode.
Storage of this data ensures secure and quick configuration of the BLE Core after the system wakes up. Every cell can be powered on or off according to the application needs for retention area when in Deep Sleep mode.
**保留RAM。**这些是4个特殊的低泄漏SRAM单元（2 kB + 2 kB + 3 kB + 1 kB），用于在系统进入深度睡眠模式时存储Bluetooth Smart协议的各种数据以及系统的全局变量和处理器堆栈。
系统唤醒后，此数据的存储可确保BLE Core的安全和快速配置。在深度睡眠模式下，可以根据应用程序对保留区域的需要来打开或关闭每个单元的电源。

3.4 FUNCTIONAL MODES 功能模式

The DA14580 is optimized for deeply embedded applications such as health monitoring, sports measuring,human interaction devices etc. Customers are able to develop and test their own applications. Upon completion of the development, the application code can be programmed into the OTP. In general, the system has three functional modes of operation:

DA14580针对深度嵌入式应用进行了优化，例如健康监测，运动测量，人机交互设备等。客户能够开发和测试自己的应用。完成开发后，可以将应用程序代码编程到OTP中。通常，系统具有三种功能操作模式：

A. Development mode: During this phase application code is developed using the ARM Cortex-M0 SW environment. The compiled code is then downloaded into the System RAM or any Retention RAMs by means of SWD (JTAG) or any serial interface (e.g. UART).
Address 0x00 is remapped to the physical memory that contains the code and the CPU is configured to reset and execute code from the remapped device. This mode is enabling application development, debugging and on-the-fly testing.

A.开发模式： 在此阶段，将使用ARM Cortex-M0 SW环境开发应用程序代码。然后将已编译的代码通过SWD（JTAG）或任何串行接口（例如UART）下载到系统RAM或任何保留RAM中。
地址0x00被重新映射到包含代码的物理存储器中，并且CPU被配置为从重新映射的设备中重置并执行代码。此模式可启用应用程序开发，调试和即时测试。

B. Normal mode: After the application is ready andverified, the code can be burned into the OTP. When the system boots/wakes up, the DMA of the OTP controller will automatically copy the program code from the OTP into the system RAM. Next, a SW reset or a jump to the System RAM occurs and code execution is started. Hence, in this mode, the system is autonomous, contains the required SW in OTP and is ready for integration into the final product.

B.普通模式： 准备好应用程序并进行验证后，可以将代码刻录到OTP中。当系统启动/唤醒时，OTP控制器的DMA将自动将程序代码从OTP复制到系统RAM。接下来，将进行软件复位或跳转到系统RAM，并开始执行代码。因此，在这种模式下，系统是自治的，在OTP中包含所需的软件，并准备集成到最终产品中。

C. Calibration mode: Between Development and Normal mode, there is an intermediate stage where the chip needs to be calibrated with respect to two important features:
• Programming of the Bluetooth device address
• Programming of the trimming value for the external 16 MHz crystal.
This mode of operation applies to the final product and is performed by the customer. During this phase, certain fields in the OTP should be programmed DA14580

**C.校准模式：**在开发和正常模式之间，存在一个中间阶段，需要针对两个重要功能对芯片进行校准：
•蓝牙设备地址的编程
•编程外部16 MHz晶振的微调值。
此操作模式适用于最终产品，由客户执行。在此阶段，应将OTP中的某些字段编程为DA14580。

3.5 POWER MODES

There are four different power modes in the DA14580:
• Active mode: System is active and operates at full speed.
• Sleep mode: No power gating has been programmed, the ARM CPU is idle, waiting for an interrupt. PD_SYS is on. PD_PER and PED_RAD depending on the programmed enabled value.
• Extended Sleep mode: All power domains are off except for the PD_AON, the programmed PD_RRx and the PD_SR. Since the SysRAM retains its data, no OTP mirroring is required upon waking up the system.
• Deep Sleep mode: All power domains are off except for the PD_AON and the programmed PD_RRx. This mode dissipates the minimum leakage power. However, since the SysRAM has not retained its data, an OTP mirror action is required upon waking up the system.

DA14580有四种不同的电源模式：
•活动模式： 系统处于活动状态并全速运行。
•睡眠模式： 未编程任何电源门控，ARM CPU处于空闲状态，等待中断。 PD_SYS已打开。PD_PER和PED_RAD取决于已编程的启用值。
•扩展睡眠模式： 除PD_AON，已编程的PD_RRx和PD_SR外，所有电源域均关闭。由于SysRAM保留其数据，因此在唤醒系统时不需要进行OTP镜像。
•深度睡眠模式： 除PD_AON和已编程的PD_RRx外，所有电源域均关闭。
此模式消耗最小的泄漏功率。但是，由于SysRAM尚未保留其数据，因此在唤醒系统时需要执行OTP镜像操作。

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