#include #define INT8U unsigned char

#define INT16 Uunsigned int

#define WRITE_BURST 0x40//连续写入

#define READ_SINGLE 0x80//读

#define READ_BURST 0xC0//连续读

#define BYTES_IN_RXFIFO 0x7F //接收缓冲区的有效字节数

#define CRC_OK 0x80 //CRC校验通过位标志

//**************CC1100接口*********

sbit GDO0=P3^3;

sbit GDO2=P1^4;

sbit MISO=P1^2;

sbit MOSI=P1^1;

sbit SCK=P3^2;

sbit CSN=P1^3;

//***********按键****************

sbit KEY1 =P3^6;

sbit KEY2 =P3^7;

//***************数码管位选****************

sbitled3=P2^0;

sbitled2=P2^1;

sbitled1=P2^2;

sbitled0=P2^3;

//***************蜂鸣器***********************

sbit BELL=P3^4;

//***************温度传感器*****************

sbit DQ=P3^5 ;

//********************************************

INT8U seg[10]={0xC0,0xCF,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90}; //0~~9段码

INT8U seg1[10]={0x40,0x4F,0x24,0x30,0x19,0x12,0x02,0x78,0x00,0x10};

INT8U data temp_data[2]={0x00,0x00};

INT8U dispaly[8];

//更多功率参数设置可详细参考DATACC1100英文文档中第48-49页的参数表

INT8U PaTabel[8] = {0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60 ,0x60}; //0dBm

void SpiInit(void);

void CpuInit(void);

void RESET_CC1100(void);

void POWER_UP_RESET_CC1100(void);

void halSpiWriteReg(INT8U addr, INT8U value);

void halSpiWriteBurstReg(INT8U addr, INT8U *buffer, INT8U count);

void halSpiStrobe(INT8U strobe);

INT8U halSpiReadReg(INT8U addr);

void halSpiReadBurstReg(INT8U addr, INT8U *buffer, INT8U count);

INT8U halSpiReadStatus(INT8U addr);

void halRfWriteRfSettings(void);

void halRfSendPacket(INT8U *txBuffer, INT8U size);

INT8U halRfReceivePacket(INT8U *rxBuffer, INT8U *length);

//****************

void delay1(INT16U i);

void ds_reset(void);

void write_byte(INT8U value);

INT8U read_byte(void);

void read_temp();

void work_temp();

//********************

// CC1100 STROBE, CONTROL AND STATUS REGSITER

#define CCxxx0_IOCFG2 0x00 // GDO2 output pin configuration

#define CCxxx0_IOCFG1 0x01 // GDO1 output pin configuration

#define CCxxx0_IOCFG0 0x02 // GDO0 output pin configuration

#define CCxxx0_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds

#define CCxxx0_SYNC1 0x04 // Sync word, high INT8U

#define CCxxx0_SYNC0 0x05 // Sync word, low INT8U

#define CCxxx0_PKTLEN 0x06 // Packet length

#define CCxxx0_PKTCTRL1 0x07 // Packet automation control

#define CCxxx0_PKTCTRL0 0x08 // Packet automation control

#define CCxxx0_ADDR 0x09 // Device address

#define CCxxx0_CHANNR 0x0A // Channel number

#define CCxxx0_FSCTRL1 0x0B // Frequency synthesizer control

#define CCxxx0_FSCTRL0 0x0C // Frequency synthesizer control

#define CCxxx0_FREQ2 0x0D // Frequency control word, high INT8U

#define CCxxx0_FREQ1 0x0E // Frequency control word, middle INT8U

#define CCxxx0_FREQ0 0x0F // Frequency control word, low INT8U

#define CCxxx0_MDMCFG4 0x10 // Modem configuration

#define CCxxx0_MDMCFG3 0x11 // Modem configuration

#define CCxxx0_MDMCFG2 0x12 // Modem configuration

#define CCxxx0_MDMCFG1 0x13 // Modem configuration

#define CCxxx0_MDMCFG0 0x14 // Modem configuration

#define CCxxx0_DEVIATN 0x15 // Modem deviation setting

#define CCxxx0_MCSM2 0x16 // Main Radio Control State Machine configuration

#define CCxxx0_MCSM1 0x17 // Main Radio Control State Machine configuration

#define CCxxx0_MCSM0 0x18 // Main Radio Control State Machine configuration

#define CCxxx0_FOCCFG 0x19 // Frequency Offset Compensation configuration

#define CCxxx0_BSCFG 0x1A // Bit Synchronization configuration

#define CCxxx0_AGCCTRL2 0x1B // AGC control

#define CCxxx0_AGCCTRL1 0x1C // AGC control

#define CCxxx0_AGCCTRL0 0x1D // AGC control

#define CCxxx0_WOREVT1 0x1E // High INT8U Event 0 timeout

#define CCxxx0_WOREVT0 0x1F // Low INT8U Event 0 timeout

#define CCxxx0_WORCTRL 0x20 // Wake On Radio control

#define CCxxx0_FREND1 0x21 // Front end RX configuration

#define CCxxx0_FREND0 0x22 // Front end TX configuration

#define CCxxx0_FSCAL3 0x23 // Frequency synthesizer calibration

#define CCxxx0_FSCAL2 0x24 // Frequency synthesizer calibration

#define CCxxx0_FSCAL1 0x25 // Frequency synthesizer calibration

#define CCxxx0_FSCAL0 0x26 // Frequency synthesizer calibration

#define CCxxx0_RCCTRL1 0x27 // RC oscillator configuration

#define CCxxx0_RCCTRL0 0x28 // RC oscillator configuration

#define CCxxx0_FSTEST 0x29 // Frequency synthesizer calibration control

#define CCxxx0_PTEST 0x2A // Production test

#define CCxxx0_AGCTEST 0x2B // AGC test

#define CCxxx0_TEST2 0x2C // Various test settings

#define CCxxx0_TEST1 0x2D // Various test settings

#define CCxxx0_TEST0 0x2E // Various test settings

// Strobe commands

#define CCxxx0_SRES 0x30 // Reset chip.

#define CCxxx0_SFSTXON 0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).

// If in RX/TX: Go to a wait state where only the synthesizer is

// running (for quick RX / TX turnaround).

#define CCxxx0_SXOFF 0x32 // Turn off crystal oscillator.

#define CCxxx0_SCAL 0x33 // Calibrate frequency synthesizer and turn it off

// (enables quick start).

#define CCxxx0_SRX 0x34 // Enable RX. Perform calibration first if coming from IDLE and

// MCSM0.FS_AUTOCAL=1.

#define CCxxx0_STX 0x35 // In IDLE state: Enable TX. Perform calibration first if

// MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:

// Only go to TX if channel is clear.

#define CCxxx0_SIDLE 0x36 // Exit RX / TX, turn off frequency synthesizer and exit

// Wake-On-Radio mode if applicable.

#define CCxxx0_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer

#define CCxxx0_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)

#define CCxxx0_SPWD 0x39 // Enter power down mode when CSn goes high.

#define CCxxx0_SFRX 0x3A // Flush the RX FIFO buffer.

#define CCxxx0_SFTX 0x3B // Flush the TX FIFO buffer.

#define CCxxx0_SWORRST 0x3C // Reset real time clock.

#define CCxxx0_SNOP 0x3D // No operation. May be used to pad strobe commands to two

// INT8Us for simpler software.

#define CCxxx0_PARTNUM 0x30

#define CCxxx0_VERSION 0x31

#define CCxxx0_FREQEST 0x32

#define CCxxx0_LQI 0x33

#define CCxxx0_RSSI 0x34

#define CCxxx0_MARCSTATE 0x35

#define CCxxx0_WORTIME1 0x36

#define CCxxx0_WORTIME0 0x37

#define CCxxx0_PKTSTATUS 0x38

#define CCxxx0_VCO_VC_DAC 0x39

#define CCxxx0_TXBYTES 0x3A

#define CCxxx0_RXBYTES 0x3B

#define CCxxx0_PATABLE 0x3E

#define CCxxx0_TXFIFO 0x3F

#define CCxxx0_RXFIFO 0x3F

// RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers

typedef struct S_RF_SETTINGS

{

INT8U FSCTRL2;//

INT8U FSCTRL1; // Frequency synthesizer control.

INT8U FSCTRL0; // Frequency synthesizer control.

INT8U FREQ2; // Frequency control word, high INT8U.

INT8U FREQ1; // Frequency control word, middle INT8U.

INT8U FREQ0; // Frequency control word, low INT8U.

INT8U MDMCFG4; // Modem configuration.

INT8U MDMCFG3; // Modem configuration.

INT8U MDMCFG2; // Modem configuration.

INT8U MDMCFG1; // Modem configuration.

INT8U MDMCFG0; // Modem configuration.

INT8U CHANNR; // Channel number.

INT8U DEVIATN; // Modem deviation setting (when FSK modulation is enabled).

INT8U FREND1; // Front end RX configuration.

INT8U FREND0; // Front end RX configuration.

INT8U MCSM0; // Main Radio Control State Machine configuration.

INT8U FOCCFG; // Frequency Offset Compensation Configuration.

INT8U BSCFG; // Bit synchronization Configuration.

INT8U AGCCTRL2; // AGC control.

INT8U AGCCTRL1; // AGC control.

INT8U AGCCTRL0; // AGC control.

INT8U FSCAL3; // Frequency synthesizer calibration.

INT8U FSCAL2; // Frequency synthesizer calibration.

INT8U FSCAL1; // Frequency synthesizer calibration.

INT8U FSCAL0; // Frequency synthesizer calibration.

INT8U FSTEST; // Frequency synthesizer calibration control

INT8U TEST2; // Various test settings.

INT8U TEST1; // Various test settings.

INT8U TEST0; // Various test settings.

INT8U IOCFG2; // GDO2 output pin configuration

INT8U IOCFG0; // GDO0 output pin configuration

INT8U PKTCTRL1; // Packet automation control.

INT8U PKTCTRL0; // Packet automation control.

INT8U ADDR; // Device address.

INT8U PKTLEN; // Packet length.

} RF_SETTINGS;

[page]

/************寄存器配置***************/

const RF_SETTINGS rfSettings =

{

0x00,

0x08, // FSCTRL1 Frequency synthesizer control.

0x00, // FSCTRL0 Frequency synthesizer control.

0x10, // FREQ2 Frequency control word, high byte.

0xA7, // FREQ1 Frequency control word, middle byte.

0x62, // FREQ0 Frequency control word, low byte.

0x5B, // MDMCFG4 Modem configuration.

0xF8, // MDMCFG3 Modem configuration.

0x03, // MDMCFG2 Modem configuration.

0x22, // MDMCFG1 Modem configuration.

0xF8, // MDMCFG0 Modem configuration.

0x00, // CHANNR Channel number.

0x47, // DEVIATN Modem deviation setting (when FSK modulation is enabled).

0xB6, // FREND1 Front end RX configuration.

0x10, // FREND0 Front end RX configuration.

0x18, // MCSM0 Main Radio Control State Machine configuration.

0x1D, // FOCCFG Frequency Offset Compensation Configuration.

0x1C, // BSCFG Bit synchronization Configuration.

0xC7, // AGCCTRL2 AGC control.

0x00, // AGCCTRL1 AGC control.

0xB2, // AGCCTRL0 AGC control.

0xEA, // FSCAL3 Frequency synthesizer calibration.

0x2A, // FSCAL2 Frequency synthesizer calibration.

0x00, // FSCAL1 Frequency synthesizer calibration.

0x11, // FSCAL0 Frequency synthesizer calibration.

0x59, // FSTEST Frequency synthesizer calibration.

0x81, // TEST2 Various test settings.

0x35, // TEST1 Various test settings.

0x09, // TEST0 Various test settings.

0x0B, // IOCFG2 GDO2 output pin configuration.

0x06, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.

0x04, // PKTCTRL1 Packet automation control.

0x05, // PKTCTRL0 Packet automation control.

0x00, // ADDR Device address.

0x0c // PKTLEN Packet length.

};

//********************

//函数名：delay(unsigned int s)

//输入：时间

//输出：无

//功能描述：普通廷时,内部用

//********************

static void delay(unsigned int s)

{

unsigned int i;

for(i=0; isync transmitted

while (!GDO0);

// Wait for GDO0 to be cleared -> end of packet

while (GDO0);

halSpiStrobe(CCxxx0_SFTX);

}

void setRxMode(void)

{

halSpiStrobe(CCxxx0_SRX);//进入接收状态

}

INT8U halRfReceivePacket(INT8U *rxBuffer, INT8U *length)

{

INT8U status[2];

INT8U packetLength;

INT8U i=(*length)*4; // 具体多少要根据datarate和length来决定

halSpiStrobe(CCxxx0_SRX);//进入接收状态

delay(2);

while (GDO0)

{

delay(2);

--i;

if(i<1)

return 0;

}

if ((halSpiReadStatus(CCxxx0_RXBYTES) & BYTES_IN_RXFIFO)) //如果接的字节数不为0

{

packetLength = halSpiReadReg(CCxxx0_RXFIFO);//读出第一个字节，此字节为该帧数据长度

if (packetLength <= *length) //如果所要的有效数据长度小于等于接收到的数据包的长度

{

halSpiReadBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength); //读出所有接收到的数据

*length = packetLength;//把接收数据长度的修改为当前数据的长度

// Read the 2 appended status bytes (status[0] = RSSI, status[1] = LQI)

halSpiReadBurstReg(CCxxx0_RXFIFO, status, 2); //读出CRC校验位

halSpiStrobe(CCxxx0_SFRX);//清洗接收缓冲区

return (status[1] & CRC_OK);//如果校验成功返回接收成功

}

else

{

*length = packetLength;

halSpiStrobe(CCxxx0_SFRX);//清洗接收缓冲区

return 0;

}

}

else

return 0;

}

//***************************************

void ds_reset(void)

{

char temp=1;

while(temp)

{

while(temp)

{

DQ=1;_nop_();_nop_();

DQ=0;

delay1(80);

DQ=1;

delay1(9);

temp=DQ;

}

delay1(64);

temp=~DQ;

}

DQ=1;

}

//************************************

void delay1(INT16U i)

{

for(;i>0;i--);

}

//*********************************************

void write_byte(INT8U value)

{

INT8U i;

for(i=8;i>0;i--)

{

DQ=1;_nop_();_nop_();

DQ=0;_nop_();_nop_();_nop_();_nop_();_nop_();

DQ=value&0x01;

delay1(9);

value>>=1;

}

DQ=1;

delay1(1);

}

//******************************************************************

INT8U read_byte(void)

{

INT8U i;

INT8U value1=0;

for(i=8;i>0;i--)

{

DQ=1;_nop_();_nop_();

value1>>=1;

DQ=0;

_nop_();_nop_();_nop_();_nop_();

DQ=1;

_nop_();_nop_();_nop_();_nop_();

if(DQ)

value1|=0x80;

delay1(9);

}

DQ=1;

return(value1);

}

//***********************************

void read_temp()

{

ds_reset();

write_byte(0xcc);

write_byte(0xbe);

temp_data[0]=read_byte();

temp_data[1]=read_byte();

ds_reset();

write_byte(0xcc);

write_byte(0x44);

}

//**************************************

void work_temp()

{

INT8U n=0;

if(temp_data[1]>127)

{

temp_data[1]=(256-temp_data[1]);//负值

temp_data[0]=(256-temp_data[0]);

n=1;

}

dispaly[6]=((temp_data[0]&0xf0)>>4)|((temp_data[1]&0x0f)<<4);

dispaly[5]=dispaly[6]/100;//百位

dispaly[4]=dispaly[6]%100;//

dispaly[2]=dispaly[4]/10;//十位

dispaly[1]=dispaly[4]%10;//个位

switch(temp_data[0]&0x0f)//小数位

{

case 0x0f:dispaly[0]=9;break;

case 0x0e:dispaly[0]=9;break;

case 0x0d:dispaly[0]=8;break;

case 0x0c:dispaly[0]=8;break;

case 0x0b:dispaly[0]=7;break;

case 0x0a:dispaly[0]=6;break;

case 0x09:dispaly[0]=6;break;

case 0x08:dispaly[0]=5;break;

case 0x07:dispaly[0]=4;break;

case 0x06:dispaly[0]=4;break;

case 0x05:dispaly[0]=3;break;

case 0x04:dispaly[0]=3;break;

case 0x03:dispaly[0]=2;break;

case 0x02:dispaly[0]=1;break;

case 0x01:dispaly[0]=1;break;

case 0x00:dispaly[0]=1;break;

default:break;

}

if(n)//负值时显示aa,正直显示dd

{

dispaly[3]=0x11;//

}

else dispaly[3]=0x22;

}

//*****************************************************************************************

void disdignit()

{

char i;

//if(temp[0])

{

for(i=0;i<3;i++)

{

P0=0xC6;

led0=0;

delay1(40);

led0=1;

P0=seg[dispaly[0]];

led1=0;

delay1(40);

led1=1;

P0=seg1[dispaly[1]];

led2=0;

delay1(40);

led2=1;

P0=seg[dispaly[2]];

led3=0;

delay1(40);

led3=1;

}

}

}

void main(void)

{

INT8U leng =0;

INT8U tf =0;

INT8U TxBuf[8]={0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08}; // 8字节, 如果需要更长的数据包,请正确设置

INT8U RxBuf[8]={0};

CpuInit();

POWER_UP_RESET_CC1100();

halRfWriteRfSettings();

halSpiWriteBurstReg(CCxxx0_PATABLE, PaTabel, 8);

//halRfSendPacket(TxBuf,8);// Transmit Tx buffer data

delay(6000);

while(1)

{

read_temp();

work_temp();

delay1(500);

disdignit();

halRfSendPacket(dispaly,4);// Transmit Tx buffer data

}

}